Very thin and, thus, elastic semiconductor devices—chips—enable many new microelectronic applications on curved or deformable surfaces. To be able to process and assemble very thin devices, e.g. having thicknesses of 10 μm to 50 μm, without any risk of breakage, they must be delivered in a corresponding package, which also enables deformation of a protective jacket (i.e. housing) and chip unit. The main task of a flexible package is to protect the very thin chip against environmental influences and mechanical breakage. A requirement placed upon electric functionality of a chip package for wire-bonded chips consists in leading contact areas of the chip out of the package and providing, on the outside of the package, new contact areas (pads) suited for adhesive or solder mounting of the package.
A flexible film package for a thin and elastic chip is known from DE 10 2006 044525 B3. This involves laminating a cover sheeting over a chip component glued onto a base film. This results in a film package having its largest thickness at the location of the component. This has the disadvantage that mechanical forces acting on the package from outside will act mainly on the fragile chip component. Winding the film package onto a roll, for example during a manufacturing or delivery process, results in bulges at the location of the chip. Thus, the pressure acts mainly on the components, which is why the risk of breakage during the further manufacturing process or during the lifetime of the product is high.
US 2005/0093172 A1 describes a chip package wherein a chip is embedded in a hot-melt adhesive. The chip is aligned in relation to conductive paths existing on a substrate, and is mounted (assembled). Subsequently, a spacer having an opening in the area of the chip and consisting of a thermoplastic resin is stacked with the substrate. Then a cover layer is applied thereon which also has a thermoplastic resin layer on its underside, whereupon the substrate and the cover are connected over the thermoplastic spacer layer by means of pressurized thermal connection. According to US 2005/0093172 A1, the chip must be contacted with the conductive paths by means of an adhesion while using an anisotropically conductive adhesive, or by means of a soldering process. To this end, a bonding process is necessary which requires a high level of adjustment accuracy for the chip and, thus, a large amount of equipment-related expenditure for the chip-bonding device. Both soldering and mounting by means of an anisotropically conductive adhesive additionally require more time, so that the method is not very fast. In addition, the chip must be placed upon the topography of an already existing conductive-path structure and must even be pressed during bonding. This is a risky process for very thin chips since during chip bonding there is no flat support, but only individual conductor tracks, so that the predefined bonding pressure is distributed in a very non-uniform manner, which results in a very high risk of breakage.
EP 1 230 680 B1 describes a method of embedding a thin semiconductor chip in printed circuit boards, i.e. rigid substrates. The chip is placed upon a lower printed circuit board plane, whereupon—for embedding the chip—a further printed circuit board plane is laminated over the chip onto the lower printed circuit board plane, and subsequently the entire structure is molded (pressed) by means of heat and pressure. The process sequence described is suitable for printed circuit board substrates, but is unsuitable for flexible films, and in particular is not at all suitable for a continuous process of roll-to-roll manufacturing.
Finally, U.S. Pat. No. 6,762,510 B2 and DE 101 22 324 A1 describe a method wherein a thin circuit wafer is transferred onto a flexible carrier film (support layer), for example a polyimide film. An entire circuit wafer is processed continuously, so that once the thin wafer has been diced (singulated), a flexible semiconductor chip results which has a polymeric cover which, however, can exist only on the topside and underside of the chip. Here, no fully enclosing package is produced for a thin semiconductor device, since the side walls of the chip are exposed once the wafer has been diced.